| | | | | | | | | | | | | | | | 2-ch, 1 GHz, 1-2 GS/s
FPGA with 6-12 MB or 12-24 MB | | | | | | Firmware for Time-to-Digital Conversion and Peak Analysis | | | | | | Firmware for real-time
sampling and averaging | | | | | | Firmware for Sustained
Sequential Recording | | | | | | 2-ch, 500 MHz, 0.5-1 GS/s
FPGA with 6-12 MB or 12-24 MB | | | | | | Firmware for Time-to-Digital Conversion and Peak Analysis | | | | | | Firmware for real-time
sampling and averaging | | | | | | Firmware for Sustained
Sequential Recording | | | | | | | | | | |
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| • | Synchronous, dual-channel real-time sampling and processing at up to 1 GS/s | | • | Interleaved single-channel sampling and processing on either input, at up to 2 GS/s | | • | Control of 2 to 8 Mpoints per channel (optional) processing memory | | • | Multi-peak detection with advanced hysteresis algorithm | | • | 12-bit peak interpolation with time resolution down to 1/16th of the sampling period | | • | Dual-bank (ping-pong) memory and post acquisition processing maintains high data throughput | | • | Raw, peak region, or peak data output to PC | | • | Data reduction to peak amplitude and time in FIFO | | • | Programmable on-board TDC histogram creation with up to 4 billion counts per bin, peak count or summed amplitude |
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Note: Some items shown on this web site may not be listed
in the current Acqiris price list and may only be available upon
specific request. Please contact your local representative for
more information. |
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